Automatic test equipment utilizing a matrix of digital differential analyzer integrators to generate interrogation signals

ABSTRACT

In computer-controlled automatic test or check-out equipment, interrogation signals for application to a unit under test are generated by a matrix of digital differential analyzer integrators, the digital outputs of the matrix be applied to digital-to-analogue converters so as to produce analogue signals to be fed to the unit under test. The computer provides initial control signals to determine the connections within the matrix and to set in initial values in the registers of the integrators, after which the matrix is driven by its own clock pulse generator, leaving the computer free for processing the response signals from the unit under test.

United States Patent Bloomer [451 Sept. 26, 1972 [54] AUTOMATIC TESTEQUIPMENT 3,585,500 6/ 1971 Grubel ..324/73 R X UTILIZING A MATRIX OFDIGITAL 3,586,837 6/1971 Hyatt et al ..235/150.31 DIFFERENTIAL ANALYZER3,598,974 8/1971 Lincoln ..235/150.31 INTEGRATORS o GENERATE 3,601,5918/1971 Gaines et al ..235/ 150.31 INTERROGATION SIGNALS OTHERPUBLICATIONS [72] Inventor: g g g wheathamp' Silber Function Generationwith a DDA lnstruea an ments And Control Systems" Vol. 33, No. 11, Nov.[73] Assignee: Haeker Siddeley Dynamics Limited, 1960 pgs. 1895- 1899Hertfordshire, England Primary Examiner-Joseph F. Ruggiero [22] Ffled'1970 Attorney-Dowel] & Dowell [21] Appl. No.: 101,685

[57] ABSTRACT [30] Foreign Application Priority Data Incomputer-controlled automatic test or check-out equipment, interrogationsignals for application to a I969 Great Bmam "63545/69 unit under testare generated by a matrix of digital differential analyzer integrators,the digital outputs of the [52] 235/15031 matrix be applied todigital-to-analogue converters so [51] Int Cl 1/02 G0 15/12 as toproduce analogue signals to be fed to the unit [58] Fieid 152 53 197under test. The computer provides initial control 235/150 151 3 153signals to determine the connections within the matrix 73 76 3 A 340/l46and to set in initial values in the registers of the integrators, afterwhich the matrix is driven by its own clock pulse generator, leaving thecomputer free for [56] References cued processing the response signalsfrom the unit under UNITED STATES PATENTS test- 3,487,304 12/ 1969Kennedy ..324/73 R 2 Claims, 8 Drawing Figures AUTOMATIC TEST EQUIPMENTUTILIZING A MATRIX OF DIGITAL DIFFERENTIAL ANALYZER INTEGRATORS TGENERATE INTERROGATION SIGNALS This invention relates tocomputer-controlled automatic test or check-out equipment.

Present day automatic test equipment (A.T.E.) employs a wide variety ofprogrammable, special to type, interrogating stimulus and measurementdevices. Nonstandard interrogating waveforms are generated using specialpurpose signal sources, mechanical resolvers and servo units. It is anobject of this invention to provide a means of synthesizinginterrogating signals by the use of digital logic and computer-basedsub-routines that will result in increased flexibility of operation andat the same time reduce costs by eliminating the wide variety of specialpurpose hardware required hitherto.

According to the present invention, a combination of two or more digitaldifferential analyzer (D.D.A.) integrators is employed in automatic testequipment as a stimulus synthesizer producing signals for interrogatinga unit under test. Integrator interconnections and initial conditionsare set up by a control computer in response to a test program so as togenerate the desired stimulus waveform.

One arrangement in accordance with the invention will now be describedby way of example, and with reference to the accompanying drawings inwhich:

FIG. 1 is a block diagram of a system according to the invention,

FIG. 2 illustrates the integrator logic of the digital differentialanalyzer,

FIG. 3 is a simplifiedrepresentation of one digital differentialanalyzer integrator,

FIG. 4 illustrates the generation of a sine wave by means of two digitaldifferential analyzer integrators,

FIG. 5 illustrates the generation of a discontinuous non-linearwaveform,

FIG. 6 shows a waveform such as can be generated by the means of FIG. 5,

FIG. 7 illustrates multiplication using three digital differentialanalyzer integrators, and

FIG. 8 is a waveform to show modulation such as can be achieved by themeans of FIG. 7.

STIMULUS SYNTHESIS Referring to FIG. 1, the unit under test (U.U.T.) 12receives synthesized input signals via a routing system 13 from a set ofdigital-to-analogue converters l l. Typical signals required are D.C.voltages, simulated synchro angles and suppressed carrier waveforms. Thedigital system must be capable of controlling the input registers of theunits under test so as to provide accurate fully synchronized voltagessimultaneously to all U.U.T. inputs 14. Concurrently with the voltagesynthesis the computer 16 controlling the testing may be required tosample and analyze the resulting U.U.T. outputs l5 fed to it viaanalogue-to-digital converters 20. It is therefore desirable to minimizethe work to be performed by the computer during voltage synthesis asthis will allow more comprehensive on-line analysis of generator 23. Thedigital differential analyzer techniques provide a method of generatinga wide variety of waveforms in a manner requiring little or no computerintervention during actual synthesis. Waveform characteristics aredetermined by the interconnection of standard D.D.A. integrators 19 inthe matrix 18. The computer program gives rise to signals from thecomputer on lines 21 and 22 determining the interconnection and initialconditions of the integrators l9 and initiating computation andsynthesis. Thereafter the computer 16 is free to monitor and analyze theresulting signals 15 received from the unit under test 'via theconverters 20. The digital techniques involved ensure preciserepeatability and phase control of all generated waveforms. Problems ofstep approximation to time functions are minimized as the register ofthe digital-to-analogue converters 11 are updated incrementallyaccording to the prescribed algebraic laws chosen.

PROGRAMMING THE D.D.A. INTEGRATOR The fundamental unit of the digitaldifferential analyzer matrix 18 is the digital integrator. By suitablyinterconnecting two or more such integrators 19 a large variety ofwaveforms may be generated in a form suitable for controlling thedigital-to-analogue converters ll. Sine waves, saw tooths and algebraicfunctions are generated to the full accuracy of the D.A.C. inputregister. Arbitrary functions are approximated by straight line orcurved segments and require a minimum of external control.

An alternative method of function generation is to control a D.A.C.input register directly from a digital computer. The speed and accuracyof this method is determined by the rate at which the computer canupdate this register. The volume of tabular data and the rate at whichit can be accessed usually dictate a course step approximation to thefunction that bears no relation to the potential D.A.C. accuracy.

In contrast the D.D.A. method generates algebraic functions to the fullaccuracy of the D.A.C. and no external control is required once theinitial conditions have been set.

INTEGRATOR LOGIC Referring to the diagrammatic representation of aD.D.A. integrator in FIG. 2, the rates of change of analogue variablesX, Y and Z are represented by pulse rates dx, dy, dz. The input dypulses are accumulated in the binary register Y. This register thereforecontains the current value of the variable Y and may be used to controla D.A.C. The independent variable of integration (which need not betime) is represented by the pulse rate dz. On receipt of a dz pulse thecontents of the Y register are added to the R register. An overflow ofthe R register results in an output pulse dx. The unit thus acts as apulse rate divider where dx Y dz. If the output pulses dx areaccumulated in the input register of a second integrator we have therelationship X f Ydz.

The signal lines dx, dy and dz are in practice twin cables. Positiverates are represented by pulses along one wire and negative rates bypulses along the other wire.

The D.D.A. integrator 19 may conveniently be represented more simply asshown in FIG. 3, which is also the manner of representation in FIG. 1.

SINE WAVE GENERATION Sine wave generation, by means of two of the D.D.A.integrators 19 appropriately connected, is illustrated in FIG. 4.

In response to a uniform pulse rate dt from the clock 23 (FIG. 1) thecontents of the Y and Z registers will vary according to therelationship The amplitude A and'phase d: are determined by the initialconditions of the Y and Z registers. The frequency is determined by theclock pulse rate dt. Other frequencies may be obtained by dividing thebasic clock pulse rate using a further D.D.A. integrator.

DISCONTINUOUS FUNCTION GENERATION Discontinuous non-linear functiongeneration is illustrated in FIGS 5 and 6.

The input register of a first integrator 19a is set by external means(the digital computer 16). The initial condition of the function F(O) isset in a second integrator 19b. The rate of change of F in the secondintegrator is determined by the value of K in the first integrator 19a.Thus each segment of the function shown graphically in FIG. 6 isgenerated automatically. External control is only required to change theslope at each breakpoint. The contents of the input register of thesecond unit 19b are used to control a digital-toanalogue converter 11.Functions may be approximated by curved segments in a similar mannerusing further D.D.A. integrators l9.

MULTIPLICATION Multiplication of varying quantities may be implementedwith three standard D.D.A. integrator units 19,

ing and also for anal zing returning signal responses resulting from thetes mg at least one periphera input device supplying information to saidcomputer, at least one peripheral output device receiving informationfrom said computer, a plurality of analogue-to-digital converters, arouting system for routing analogue signals to a unit under test andalso for routing analogue signal responses from the unit under test tosaid analogue-to-digital converters, a response input channel of saidcomputer receiving for computer analysis the digital signal outputs ofsaid analogue-to-digital converters, a plurality of digital differentialanalyzer integrators combined into a matrix with variableinterconnections for synthesizing a variety of digital test signals, acontrol output channel of said computer delivering computer outputsignals to said matrix to determine said matrix interconnections andalso to set the initial conditions in said integrators, and a pluralityof digital-to-analogue converters receiving said synthesized digitaltest signals from said matrix and converting them into said analoguetest signals which are delivered to said routing system.

2. Equipment according to claim 1, wherein a clock pulse generator isprovided to-drive the integrator matrix after the interconnections andinitial conditions have been determined by the computer signals, therebyleaving the computer free to process response signals returning from theunit under test.

* i IF IF UNITED sTATEs PATENT OFFICE CERTIFICATE OF CORRECTION PatentNo. 9 ,632 Dated September 26, 1972 Inventor(s) DAVID HN BLOOMER It iscertified that error appears in the vabove-identified patent and thatsaid Letters Patent are hereby corrected as shown below: i

In the heading of the patent, column 1, line 8,

correct the spelling of the name of applicant's assignee to read HAWKERSIDDELEY DYNAMICS LIMITED.

Signed and sealed this 24th day of April 1973.

(SEAL) Attest:

EDWARD M.FLETCHER,JR. ROBERT GOTTSCHALK Attesting Officer Commissionerof Patents FORM PO-105O (10-69) USCOMM-DC 60376-F'69 U.S GOVERNMENTPRINTING OFFICE: I969 0-356-335

1. Computer-controlled automatic test equipment, comprising a digitalcomputer for controlling the testing and also for analyzing returningsignal responses resulting from the testing at least one peripheralinput device supplying information to said computer, at least oneperipheral output device receiving information from said computer, aplurality of analogue-todigital converters, a routing system for routinganalogue signals to a unit under test and also for routing analoguesignal responses from the unit under test to said analogue-to-digitalconverters, a response input channel of said computer receiving forcomputer analysis the digital signal outputs of said analogue-to-digitalconverters, a plurality of digital differential analyzer integratorscombined into a matrix with variable interconnections for synthesizing avariety of digital test signals, a control output channel of saidcomputer delivering computer output signals to said matrix to determinesaid matrix interconnections and also to set the initial conditions insaid integrators, and a plurality of digital-toanalogue convertersreceiving said synthesized digital test signals from said matrix andconverting them into said analogue test signals which are delivered tosaid routing system.
 2. Equipment according to claim 1, wherein a clockpulse generator is provided to drive the integrator matrix after theinterconnections and initial conditions have been determined by thecomputer signals, thereby leaving the computer free to process responsesignalS returning from the unit under test.